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cgal/Arrangement_on_surface_2/benchmark/data/benchArrAosPolylines.xml

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<?xml version="1.0" encoding="ISO-8859-1"?>
<bench name_length="96" print_header="0" type_mask="3" strategy_mask="4">
<class name="cls111" key="increment walk Non Caching Polylines Cartesian Cgal Gmpq"/>
<class name="cls112" key="aggregate Non Caching Polylines Cartesian Cgal Gmpq"/>
<class name="cls121" key="increment walk Non Caching Polylines Simple Cartesian Cgal Gmpq"/>
<class name="cls122" key="aggregate Non Caching Polylines Simple Cartesian Cgal Gmpq"/>
<class name="cls131" key="increment walk Non Caching Polylines Lazy Cartesian Cgal Gmpq"/>
<class name="cls132" key="aggregate Non Caching Polylines Lazy Cartesian Cgal Gmpq"/>
<class name="cls141" key="increment walk Non Caching Polylines Lazy Simple Cartesian Cgal Gmpq"/>
<class name="cls142" key="aggregate Non Caching Polylines Lazy Simple Cartesian Cgal Gmpq"/>
<class name="cls151" key="increment walk Non Caching Polylines Exact Cgal Gmpq"/>
<class name="cls152" key="aggregate Non Caching Polylines Exact Cgal Gmpq"/>
<class name="cls161" key=""/>
<class name="cls162" key=""/>
<class name="cls171" key=""/>
<class name="cls172" key=""/>
<class name="cls211" key="increment walk Polylines Cartesian Cgal Gmpq"/>
<class name="cls212" key="aggregate Polylines Cartesian Cgal Gmpq"/>
<class name="cls221" key="increment walk Polylines Simple Cartesian Cgal Gmpq"/>
<class name="cls222" key="aggregate Polylines Simple Cartesian Cgal Gmpq"/>
<class name="cls231" key="increment walk Polylines Lazy Cartesian Cgal Gmp"/>
<class name="cls232" key="aggregate Polylines Lazy Cartesian Cgal Gmpq"/>
<class name="cls241" key="increment walk Polylines Lazy Simple Cartesian Cgal Gmpq"/>
<class name="cls242" key="aggregate Polylines Lazy Simple Cartesian Cgal Gmpq"/>
<class name="cls251" key="increment walk Polylines Exact Cgal Gmpq"/>
<class name="cls252" key="aggregate Polylines Exact Cgal Gmpq"/>
<class name="cls261" key=""/>
<class name="cls262" key=""/>
<class name="cls271" key=""/>
<class name="cls272" key=""/>
<clo name="verbose" string="--verbose"/>
<clo name="samples" string="--samples"/>
<clo name="print_header" string="--print-header"/>
<clo name="name_length" string="--name-length"/>
<clo name="type_mask" string="--type-mask"/>
<clo name="strategy_mask" string="--strategy-mask"/>
<file name="sines.bff" curves="10"
vertices="40" halfedges="420" faces="172"></file>
<file name="circs_pol_10.bff" curves="10"
vertices="112" halfedges="408" faces="94"></file>
<file name="netherland_border.bff" curves="38"
vertices="347" halfedges="684" faces="27"></file>
<file name="netherland_cities.bff" curves="157"
vertices="900" halfedges="1882" faces="175"></file>
<file name="netherland_oceans.bff" curves="38"
vertices="275" halfedges="550" faces="32"></file>
<file name="netherland_rivers.bff" curves="111"
vertices="847" halfedges="2028" faces="245"></file>
<file name="netherland_streets.bff" curves="904"
vertices="1030" halfedges="2482" faces="215"></file>
<bench samples="10" file="sines.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="circs_pol_10.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="netherland_border.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="netherland_cities.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="netherland_oceans.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="netherland_rivers.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
<bench samples="10" file="netherland_streets.bff" enable="true">
<bench>
<benchArrCgalGmpqCartesianNonCachingPolyline print_header="1"/>
<benchAosCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyCgalGmpqCartesianNonCachingPolyline/>
<benchAosLazyCgalGmpqCartesianNonCachingPolyline/>
<benchArrLazyQuotientCartesianNonCachingPolyline/>
<benchAosLazyQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCartesianNonCachingPolyline/>
<benchAosQuotientCartesianNonCachingPolyline/>
<benchArrQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchAosQuotientCgalGmpzCartesianNonCachingPolyline/>
<benchArrCgalGmpqExactNonCachingPolyline enable="false"/>
<benchArrLazyRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatCartesianNonCachingPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianNonCachingPolyline enable="false"/>
<benchArrDoubleCartesianNonCachingPolyline enable="false"/>
</bench>
<bench>
<benchArrCgalGmpqCartesianPolyline print_header="1"/>
<benchAosCgalGmpqCartesianPolyline/>
<benchArrCgalGmpqExactPolyline/>
<benchAosCgalGmpqExactPolyline/>
<benchArrLazyCgalGmpqCartesianPolyline/>
<benchAosLazyCgalGmpqCartesianPolyline/>
<benchArrLazyQuotientCartesianPolyline/>
<benchAosLazyQuotientCartesianPolyline/>
<benchArrQuotientCartesianPolyline/>
<benchAosQuotientCartesianPolyline/>
<benchArrQuotientCgalGmpzCartesianPolyline/>
<benchAosQuotientCgalGmpzCartesianPolyline/>
<benchArrLazyRatCartesianPolyline enable="false"/>
<benchArrLedaRatCartesianPolyline enable="false"/>
<benchArrLedaRatLedaPolyline enable="false"/>
<benchArrLedaRatSimpleCartesianPolyline enable="false"/>
<benchArrDoubleCartesianPolyline enable="false"/>
</bench>
</bench>
</bench>
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